The present invention relates to microelectronics packaging and more specifically to apparatuses and methods for improved transmission of signals within a package to a chip mounted to the package.
The packaging of semiconductor chips, i.e., active and passive integrated circuits, micro-electromechanical devices, piezoelectric devices, etc., is becoming more challenging as the frequency response demanded from semiconductor chips increases. Increasingly, the inductance and capacitance of features on the package must be considered in solutions for improving impedance matching. Inadequate impedance matching is a cause of signal attenuation due to reflections at external boundaries of the package and the chip. Moreover, particular measures needed to address this problem vary with the frequency of the signals to be carried by the conductors on the package to and/or from the chip. While it is sometimes sufficient to reduce resistance and inductance of conductors on the package by increasing the cross-sectional area of the signal conductor and/or reducing its length, performance reaches an upper boundary after which further improvements are no longer available.
In such case, further improvements are needed which affect the kind of signal conductor provided on a package and/or which perform additional functions which are not ordinarily performed in packages on which chips are mounted.
For example, FIG. 1 illustrates a packaged chip 100 according to the prior art in which a chip 102 is mounted face up on a package element 104. As shown in FIG. 1, the package element includes a dielectric element, e.g., a layer including a polymer, viz. polyimide, on which a patterned metal layer 108 is provided. A rear surface 112 of the chip 102 is mounted to the metal layer 108, e.g., by an adhesive known as “die attach” 114. In the “circuits-in” arrangement shown in FIG. 1, the patterned metal layer 108 overlies a side of the dielectric element 106 which faces the chip 102. Bond wires 110 conductively connect bond pads 116 provided on a front face 118 of the chip to terminals 120 of the package element 104. Typically, the bond wires are long, narrow conductors which have substantial inductance and resistance, both of which tend to increase with increasing signal frequency.
Typically, the length of the bond wires is greater than the height of the chip plus the distance between the bond pads of the chip and the terminals of the chip to allow for the bond wires to bend. Moreover, the length of the bond wires is also affected by the lateral distance they must extend from the chip, mounted near a center of the package element, to terminals at the periphery of the package element. Such factors negatively affect the desirability of a wire-bonded arrangement for packaging a chip used in applications utilized at higher signal frequencies.